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Lead ASIC Digital Design Engineer

General Dynamics

General Dynamics

Wired and Radio Communication Technology

Annapolis Junction, MD - USA

Senior Specialist / Project Manager

Experteer Overview

In this role you will lead the development of ASIC and FPGA digital designs, shaping microarchitecture and IP integration for high-performance systems. You will work with cross-functional teams to translate requirements into robust RTL implementations and optimized designs. You’ll guide design methods, mentor engineers, and drive successful completion of major programs. This opportunity lets you apply cutting-edge IP to mission-critical defense technology and contribute to scalable, secure hardware solutions.

Compensation / Benefits

  • flexible work environment
  • competitive benefits

Responsibilities

  • Collaborate with team leaders to identify real problems and solutions
  • Develop and define microarchitecture of new IP to optimize performance, power, area, cost, and security
  • Implement and simulate IP blocks in RTL using SystemVerilog, VHDL, and other languages
  • Integrate complex systems that include both company and third-party IP
  • Contribute to design success from specification to production
  • Apply state-of-the-art IP to ASIC and FPGA products in real-world scenarios
  • Define and improve high-quality design methods and processes
  • Mentor and guide other ASIC design engineers
  • Support successful completion of major programs and projects

Key requirements

  • Bachelor in Electrical Engineering, Computer Engineering, or related field
  • 8+ years of job-related experience, or Master plus 6 years
  • Solid background in FPGA/ASIC product development (5+ years)
  • Experience with digital architectures and design methods (RTL coding, synthesis, place-and-route, timing closure, constrained-random, formal verification)
  • Strong analytical and problem-solving skills
  • Excellent written and verbal communication
  • Willingness to work with cross-functional teams
  • Clearance: ability to obtain DoD Secret clearance; U.S. citizenship required

Description

In this role you will lead the development of ASIC and FPGA digital designs, shaping microarchitecture and IP integration for high-performan…
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