Digital IC Design Manager – CPU AI
Headhunter: Intellectual Capital Resources
Semiconductor Production
France
Manager / Team Leader
Experteer Overview
Auvergne Rhone Alpes, France 100k and aboveJob ID: 329362 Working for a cutting-edge semiconductor company, based in Grenoble, I have an exciting opportunity as Digital IC Design Manager.You will be tasked with the end-to-end design, development and architecture of cutting-edge ASIC SOCs for complex CPU based AI applications.Must have experience:Degree / Masters / PhD in electronics / micro-electronics, physics or similar field10+ years’ experience of full chip design and deliveryTech lead / team leadership / team management – circa 10-20 peopleASIC / FPGA digital design – verilog, s
Responsibilities
- Lead end-to-end ASIC/SoC digital design and architecture
- Manage and mentor a 10–20 person engineering team
- Oversee verification and validation across the design flow (UVM, formal)
- Coordinate tape-out deliveries and ensure silicon first-time yield
- Interface with cross-functional teams for system-level integration and timing closure
- Maintain knowledge of interconnects and protocols (NOC/IP, AXI, AMBA) and high-speed interfaces
- Champion design-for-testability and release readiness
- Ensure adherence to project timelines and quality metrics
Key requirements
- 10+ years of full chip design and delivery experience
- Tech lead / team leadership / people management
- ASIC / FPGA digital design experience
- CPU / RISC-V design and architecture
- Experience delivering digital chips and complex SoCs
- SOC interconnects and protocols (NOC IP, AXI, AMBA)
- High-speed digital product understanding (SerDes, PCIe, Ethernet, DDR)
- Functional verification UVM
- Formal verification tools (JasperGold, OneSpin, VC Formal, MathWorks)
- Knowledge of complete ASIC/SOC/chip design flow
- Proven tape-out deliveries (silicon right first time)
Description
Auvergne Rhone Alpes, France 100k and aboveJob ID: 329362 …
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