Details: Senior Staff Signal Integrity Engineer Job Tracking ID: Eng - 819 Department: Engineering Type: Full-Time/Regular Location: Fremont, CA Date Updated: January 12, 2010 Job Description: Primary responsibilities include: Responsible for developing channel analysis methodology for multgiga bit serial buses Lab characterization of test structures and correlation with simulations Jitter characterization and decomposition Interface with CAD tool vendors to implement channel analysis methodology Assist in bring up and characterization of ASIC SerDes Experience and Skills: BSEE required, MS or PhD EE preferred 10+ years in hands on signal integrity analysis and testing Knowledge of tools such as SPIC
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